The ability to track and then hold the level of an analog waveform is often an essential function in the signal acquisition interface of a digital video system or a high speed instrument. Analog signals are also utilized in various applications including communications and computer disk drives, to name but two additional specific applications. The analog signals used in these and other applications are usually sampled at periodic intervals and the amplitude thereof detected and stored. The thus sampled analog signal resembles a stair step approximation of the original signal with steps occurring at the sampling or clocking rate. The circuits for producing the stair step approximation of the original signal are known as a track and hold circuits or, in the alternative, as sample and hold circuits.
Track and hold circuits typically have a storage device such as a capacitor which stores the amplitude of the signal being tracked. The circuit includes a switch which connects the storage device to the signal being tracked. During the time the switch is closed, the voltage on the storage device tracks the signal voltage as it changes. During the time that the switch is open, the storage device holds the voltage thereon at the level of the signal being tracked as of substantially at the instant the switch was opened.
While many track and hold circuits have been heretofore developed, some of these circuits have proved to be of lower speed than desired for high speed operation. This is particularly a problem with closed-loop configurations. A second problem encountered with prior art track and hold circuits is that they require relatively higher power levels than is desirable in some applications such as disk drives in portable or lap top computers. A third problem relates to the accuracy of the circuit to preserve the actual analog signal voltage which had been attained at the exact instant the circuit switches from its tracking mode to its hold mode.
Known track and hold circuits usually utilize a capacitor which is quickly charged to the input voltage during the clock pulse which defines the tracking period. At the trailing edge of the clock pulse, the capacitor stops being charged by the circuit and largely remains at the voltage of the input to the circuit until the next clock pulse arrives. This means that the circuit must shift very quickly from its tracking mode to its holding mode which requires very quickly disconnecting the capacitor charging circuit. The prior art circuits for accomplishing this shift, however, have generally been high power circuits which dissipate more energy than is desirable in applications such as portable or lap top computers and the like.